A multimedia interface standard defines the connections between a multimedia transmitter (e.g., a set-top box, a DVD player, a personal computer, a video game console, etc.) and a compatible multimedia receiver (e.g., video monitor such as a digital television). Multimedia interface standards include, for example, a high-definition multimedia interface (HDMI™), a digital video interface (DVI), a display port interface, an high-definition serial data interface (HD-SDI). A typical architecture of a receiver and a transmitter compliant with the multimedia interface standards include a physical layer, a link layer, and an application layer.
An illustration of multimedia a transmitter 110 and receiver 120 including a physical layer 101, a link layer 102, and an application layer 103 is shown in FIG. 1. The physical 101 and data link layers 102 operate according to specification of the multimedia standard and design to provide a reliable mechanism for transferring video/audio data over a cable 130 connected between the receiver 120 and transmitter 110. The application layer 103 implements native video processing standards (e.g., a SMPTE and ITU-R). These standards define the requirements for video processing operations, such as color space conversion and filtering.
The video processing of is performed by a video processor (not shown) operative in the application layer 103, which is adapted to process (at the receiver 120 side) digital video data sent over the cable 130 and to send the resulting video data to a display. In addition, the video processor (at the transmitter 110 side) processes video signals received from a video source and sends the resulting video data over the cable 130.
A video processor either at the receiver 120 or transmitter 110 has to meet the physical throughput of the multimedia interface. With this aim, the video processor is typically designed as a specific-purpose digital signal processor (DSP) that can handle one or more pixel components per clock. Specifically, a conventional video processor is designed to process a certain number of bits per pixel or “bitwidth” at a given pixel clock frequency. For example, typical working points of a video processor utilized in HDMI systems are: 1) 8 bit/pixel at a pixel clock frequency of 350 MHz; 2) 12 bit/pixel at a pixel clock frequency of 225 MHz; 3) and 16 bit/pixel at a pixel clock frequency of 175 MHz.
The bitwidth is a parameter that defines the arithmetic precision of a digital signal processing operation. Typically, this parameter is hard-coded, and therefore cannot be changed during the operation of the video processor. That is, conventional video processors are typically designed to properly operate only in a single work point, trying to increase the work point to a higher clock frequency at the highest bitwidth in most cases is not feasible. For example, a video processor configured with a bitwidth of 16 bit/pixel at a clock frequency of 175 MHz may not function at a bitwidth of 16 bit/pixel at a clock frequency of 350 MHz. Accordingly, the precision and frequency of digital signal processing operations cannot be controlled during the operation of a video processor.
The problem with providing a video processor having a variable and programmable bitwidth parameter can be excessively expensive to incorporate into many types of devices. The more sophisticated the video processing functions, the more expensive, in terms of silicon die area, transistor count, memory speed requirements, and so on, the integrated circuit (IC) device required to implement such functions will be. Accordingly, IC designers are forced to make tradeoffs with respect to the video processor performance and cost. Basically, the tradeoff is higher bitwidth to achieve higher precision at a lower speed versus smaller bitwidth with less precision at higher speed. The tradeoff is a hard-coded static decision, which determined according to the value of the bitwidth parameter. Accordingly, the number of applications that a conventional video processor can support is limited.
It would be therefore advantageous to provide a video processor with a variable and programmable bitwidth parameter.